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| author | Clifford Wolf <clifford@clifford.at> | 2019-08-17 15:01:31 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2019-08-17 15:01:31 +0200 |
| commit | 8915f496d97a2e858cbadb265695dd1a54b80ac4 (patch) | |
| tree | 352bd2245f166e0f6679fed971655c7d3df0a7b4 /kernel/macc.h | |
| parent | 41191f1ea48437423b4caf81e6af1e3024bb8c7d (diff) | |
| parent | 3b19c3657cda6d972bd3b1c3eeacdfca5fb35de8 (diff) | |
| download | yosys-8915f496d97a2e858cbadb265695dd1a54b80ac4.tar.gz yosys-8915f496d97a2e858cbadb265695dd1a54b80ac4.tar.bz2 yosys-8915f496d97a2e858cbadb265695dd1a54b80ac4.zip | |
Merge pull request #1300 from YosysHQ/eddie/cleanup2
Use ID::{A,B,Y,keep,blackbox,whitebox} instead of ID()
Diffstat (limited to 'kernel/macc.h')
| -rw-r--r-- | kernel/macc.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/kernel/macc.h b/kernel/macc.h index e07e7e01a..371f6737d 100644 --- a/kernel/macc.h +++ b/kernel/macc.h @@ -99,10 +99,10 @@ struct Macc void from_cell(RTLIL::Cell *cell) { - RTLIL::SigSpec port_a = cell->getPort(ID(A)); + RTLIL::SigSpec port_a = cell->getPort(ID::A); ports.clear(); - bit_ports = cell->getPort(ID(B)); + bit_ports = cell->getPort(ID::B); std::vector<RTLIL::State> config_bits = cell->getParam(ID(CONFIG)).bits; int config_cursor = 0; @@ -191,8 +191,8 @@ struct Macc port_a.append(port.in_b); } - cell->setPort(ID(A), port_a); - cell->setPort(ID(B), bit_ports); + cell->setPort(ID::A, port_a); + cell->setPort(ID::B, bit_ports); cell->setParam(ID(CONFIG), config_bits); cell->setParam(ID(CONFIG_WIDTH), GetSize(config_bits)); cell->setParam(ID(A_WIDTH), GetSize(port_a)); |