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| author | Marcelina Kościelnicka <mwk@0x04.net> | 2021-07-11 23:57:53 +0200 |
|---|---|---|
| committer | Marcelina Kościelnicka <mwk@0x04.net> | 2021-07-12 00:47:34 +0200 |
| commit | 009940f56ca71cc8655a13a514371eb5757b96ca (patch) | |
| tree | 8b194a81a92590973eb662c1207a876d010b2966 /kernel/mem.h | |
| parent | 726fabd65e51c7a15a2a2dc24d3b99426ef43ad2 (diff) | |
| download | yosys-009940f56ca71cc8655a13a514371eb5757b96ca.tar.gz yosys-009940f56ca71cc8655a13a514371eb5757b96ca.tar.bz2 yosys-009940f56ca71cc8655a13a514371eb5757b96ca.zip | |
rtlil: Make Process handling more uniform with Cell and Wire.
- add a backlink to module from Process
- make constructor and destructor protected, expose Module functions
to add and remove processes
Diffstat (limited to 'kernel/mem.h')
0 files changed, 0 insertions, 0 deletions