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| author | Claire Xenia Wolf <claire@clairexen.net> | 2021-09-27 16:02:20 +0200 |
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| committer | Claire Xenia Wolf <claire@clairexen.net> | 2021-09-27 16:02:20 +0200 |
| commit | 89df26e4bcc958708f9c0715440ff08975d4e0f7 (patch) | |
| tree | a1af2b6441f019ae0e7b42bd0336067b7a97dd6d /kernel/rtlil.cc | |
| parent | 1cac671c70bc3da9808ceb3add15686da4a5d82e (diff) | |
| download | yosys-89df26e4bcc958708f9c0715440ff08975d4e0f7.tar.gz yosys-89df26e4bcc958708f9c0715440ff08975d4e0f7.tar.bz2 yosys-89df26e4bcc958708f9c0715440ff08975d4e0f7.zip | |
Add optimization to rtlil back-end for all-x parameter values
Signed-off-by: Claire Xenia Wolf <claire@clairexen.net>
Diffstat (limited to 'kernel/rtlil.cc')
0 files changed, 0 insertions, 0 deletions