Added RTLIL::Module::fixup_ports() API and RTLIL::*::rewrite_sigspecs() API

1 files changed, 48 insertions, 0 deletions

diff --git a/kernel/rtlil.h b/kernel/rtlil.h
index b15082889..695139244 100644
--- a/kernel/rtlil.h
+++ b/kernel/rtlil.h
@@ -237,6 +237,18 @@ struct RTLIL::Module {
 	virtual void optimize();
 	void add(RTLIL::Wire *wire);
 	void add(RTLIL::Cell *cell);
+	void fixup_ports();
+
+	template<typename T> void rewrite_sigspecs(T functor) {
+		for (auto &it : cells)
+			it.second->rewrite_sigspecs(functor);
+		for (auto &it : processes)
+			it.second->rewrite_sigspecs(functor);
+		for (auto &it : connections) {
+			functor(it.first);
+			functor(it.second);
+		}
+	}
 };
 
 struct RTLIL::Wire {
@@ -261,6 +273,11 @@ struct RTLIL::Cell {
 	std::map<RTLIL::IdString, RTLIL::Const> attributes;
 	std::map<RTLIL::IdString, RTLIL::Const> parameters;
 	void optimize();
+
+	template<typename T> void rewrite_sigspecs(T functor) {
+		for (auto &it : connections)
+			functor(it.second);
+	}
 };
 
 struct RTLIL::SigChunk {
@@ -328,6 +345,17 @@ struct RTLIL::CaseRule {
 	std::vector<RTLIL::SwitchRule*> switches;
 	~CaseRule();
 	void optimize();
+
+	template<typename T> void rewrite_sigspecs(T functor) {
+		for (auto &it : compare)
+			functor(it);
+		for (auto &it : actions) {
+			functor(it.first);
+			functor(it.second);
+		}
+		for (auto it : switches)
+			it->rewrite_sigspecs(functor);
+	}
 };
 
 struct RTLIL::SwitchRule {
@@ -336,6 +364,12 @@ struct RTLIL::SwitchRule {
 	std::vector<RTLIL::CaseRule*> cases;
 	~SwitchRule();
 	void optimize();
+
+	template<typename T> void rewrite_sigspecs(T functor) {
+		functor(signal);
+		for (auto it : cases)
+			it->rewrite_sigspecs(functor);
+	}
 };
 
 struct RTLIL::SyncRule {
@@ -343,6 +377,14 @@ struct RTLIL::SyncRule {
 	RTLIL::SigSpec signal;
 	std::vector<RTLIL::SigSig> actions;
 	void optimize();
+
+	template<typename T> void rewrite_sigspecs(T functor) {
+		functor(signal);
+		for (auto &it : actions) {
+			functor(it.first);
+			functor(it.second);
+		}
+	}
 };
 
 struct RTLIL::Process {
@@ -352,6 +394,12 @@ struct RTLIL::Process {
 	std::vector<RTLIL::SyncRule*> syncs;
 	~Process();
 	void optimize();
+
+	template<typename T> void rewrite_sigspecs(T functor) {
+		root_case.rewrite_sigspecs(functor);
+		for (auto it : syncs)
+			it->rewrite_sigspecs(functor);
+	}
 };
 
 #endif