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| author | Clifford Wolf <clifford@clifford.at> | 2014-10-15 01:20:14 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2014-10-15 01:20:14 +0200 |
| commit | 8cea352a6aafa80d397d8a6a7d195c1378dcb324 (patch) | |
| tree | cc670a0dadca8f6df7a1d24e1f00fa649d40f29a /kernel/rtlil.h | |
| parent | 2873a8444ee5dbd0a3d034fb4a7a877c680be45d (diff) | |
| parent | 1fc6208ec05af672c7c6b7973b0eba1295bca5f4 (diff) | |
| download | yosys-8cea352a6aafa80d397d8a6a7d195c1378dcb324.tar.gz yosys-8cea352a6aafa80d397d8a6a7d195c1378dcb324.tar.bz2 yosys-8cea352a6aafa80d397d8a6a7d195c1378dcb324.zip | |
Merge branch 'win32'
Diffstat (limited to 'kernel/rtlil.h')
| -rw-r--r-- | kernel/rtlil.h | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/kernel/rtlil.h b/kernel/rtlil.h index 8df0bfe19..5629c8652 100644 --- a/kernel/rtlil.h +++ b/kernel/rtlil.h @@ -920,23 +920,25 @@ struct RTLIL::SigBit } }; -struct RTLIL::SigSpecIterator +struct RTLIL::SigSpecIterator : public std::iterator<std::input_iterator_tag, RTLIL::SigSpec> { RTLIL::SigSpec *sig_p; int index; inline RTLIL::SigBit &operator*() const; inline bool operator!=(const RTLIL::SigSpecIterator &other) const { return index != other.index; } + inline bool operator==(const RTLIL::SigSpecIterator &other) const { return index == other.index; } inline void operator++() { index++; } }; -struct RTLIL::SigSpecConstIterator +struct RTLIL::SigSpecConstIterator : public std::iterator<std::input_iterator_tag, RTLIL::SigSpec> { const RTLIL::SigSpec *sig_p; int index; inline const RTLIL::SigBit &operator*() const; inline bool operator!=(const RTLIL::SigSpecConstIterator &other) const { return index != other.index; } + inline bool operator==(const RTLIL::SigSpecIterator &other) const { return index == other.index; } inline void operator++() { index++; } }; |