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| author | Clifford Wolf <clifford@clifford.at> | 2013-10-24 11:37:54 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2013-10-24 11:37:54 +0200 |
| commit | e679a5d04633e0c0626057ed2760ddb9595eea5d (patch) | |
| tree | cce75cbef78ff294cc26a992347fe16b713db996 /kernel/rtlil.h | |
| parent | e9dede01ca8834ea3c211862a5d6c0119b2b578a (diff) | |
| download | yosys-e679a5d04633e0c0626057ed2760ddb9595eea5d.tar.gz yosys-e679a5d04633e0c0626057ed2760ddb9595eea5d.tar.bz2 yosys-e679a5d04633e0c0626057ed2760ddb9595eea5d.zip | |
Fixed handling of boolean attributes (passes)
Diffstat (limited to 'kernel/rtlil.h')
| -rw-r--r-- | kernel/rtlil.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/kernel/rtlil.h b/kernel/rtlil.h index 87271bbf9..9fae954c1 100644 --- a/kernel/rtlil.h +++ b/kernel/rtlil.h @@ -368,7 +368,7 @@ struct RTLIL::CaseRule { struct RTLIL::SwitchRule { RTLIL::SigSpec signal; - std::map<RTLIL::IdString, RTLIL::Const> attributes; + RTLIL_ATTRIBUTE_MEMBERS std::vector<RTLIL::CaseRule*> cases; ~SwitchRule(); void optimize(); |