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authorClifford Wolf <clifford@clifford.at>2016-08-26 23:35:27 +0200
committerClifford Wolf <clifford@clifford.at>2016-08-26 23:35:27 +0200
commit1276c87a56f6f6d1a134877f024d2af785354570 (patch)
treee8b79ee0f55ff94d276b649b055bd2f4e731ba98 /kernel/yosys.cc
parent17233b11e185d2c863ccd06830e8cd0d2be38e83 (diff)
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Added read_verilog -norestrict -assume-asserts
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