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| author | Rupert Swarbrick <rswarbrick@gmail.com> | 2020-05-22 16:59:24 +0100 |
|---|---|---|
| committer | Rupert Swarbrick <rswarbrick@gmail.com> | 2020-05-26 13:18:01 +0100 |
| commit | 17b5f23f20d6cadc8ce6220e457880720aae4866 (patch) | |
| tree | 7ee9118717e9ba7302d88ddd3571542262335dbb /kernel/yosys.cc | |
| parent | a7f2ef6d34c4b336a910b3c6f3d2cc11da8a82b4 (diff) | |
| download | yosys-17b5f23f20d6cadc8ce6220e457880720aae4866.tar.gz yosys-17b5f23f20d6cadc8ce6220e457880720aae4866.tar.bz2 yosys-17b5f23f20d6cadc8ce6220e457880720aae4866.zip | |
Use default copy constructor for RTLIL::SigBit
There was a handwritten copy constructor, which I'm not sure was
actually legal C++ (it unconditionally read from the 'data' member of
a union, which wouldn't have been written if wire was true). It was
also a bit less efficient than the constructor you get from the
compiler by default (which is allowed to just copy the memory).
This gives a marginal (~0.25%) decrease in code size when compiled
with GCC 9.3.
Diffstat (limited to 'kernel/yosys.cc')
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