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author | Eddie Hung <eddie@fpgeh.com> | 2019-06-18 11:48:48 -0700 |
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committer | Eddie Hung <eddie@fpgeh.com> | 2019-06-18 11:48:48 -0700 |
commit | 8e0a47fb920af1126adb67f884b5ce1443a9b4a9 (patch) | |
tree | 344405b80a0a85324f7f07e31e70ea6f94cd759f /kernel | |
parent | 8f5e6d73ff3c81d96fbb53e0c67572830800c301 (diff) | |
download | yosys-8e0a47fb920af1126adb67f884b5ce1443a9b4a9.tar.gz yosys-8e0a47fb920af1126adb67f884b5ce1443a9b4a9.tar.bz2 yosys-8e0a47fb920af1126adb67f884b5ce1443a9b4a9.zip |
Really permute Xilinx LUT mappings as default LUT6.I5:A6
Diffstat (limited to 'kernel')
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