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| author | Clifford Wolf <clifford@clifford.at> | 2014-07-26 15:57:57 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2014-07-26 15:58:23 +0200 |
| commit | f8fdc47d3361c1a3445a9357ca26cfe75907d6b0 (patch) | |
| tree | e4b1c2f97db2c317f8b986635141dfd7bb8e78d8 /kernel | |
| parent | b7dda723022ad00c6c0089be888eab319953faa8 (diff) | |
| download | yosys-f8fdc47d3361c1a3445a9357ca26cfe75907d6b0.tar.gz yosys-f8fdc47d3361c1a3445a9357ca26cfe75907d6b0.tar.bz2 yosys-f8fdc47d3361c1a3445a9357ca26cfe75907d6b0.zip | |
Manual fixes for new cell connections API
Diffstat (limited to 'kernel')
| -rw-r--r-- | kernel/rtlil.cc | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/kernel/rtlil.cc b/kernel/rtlil.cc index 9781fa32b..ceb2b0f52 100644 --- a/kernel/rtlil.cc +++ b/kernel/rtlil.cc @@ -773,7 +773,7 @@ void RTLIL::Module::optimize() void RTLIL::Module::cloneInto(RTLIL::Module *new_mod) const { new_mod->name = name; - new_mod->connections() = connections_; + new_mod->connections_ = connections_; new_mod->attributes = attributes; for (auto &it : wires) @@ -924,7 +924,7 @@ RTLIL::Cell *RTLIL::Module::addCell(RTLIL::IdString name, RTLIL::IdString type) RTLIL::Cell *RTLIL::Module::addCell(RTLIL::IdString name, const RTLIL::Cell *other) { RTLIL::Cell *cell = addCell(name, other->type); - cell->connections() = other->connections(); + cell->connections_ = other->connections_; cell->parameters = other->parameters; cell->attributes = other->attributes; return cell; @@ -1036,8 +1036,8 @@ DEF_METHOD(SafePmux, "$safe_pmux", 1) RTLIL::Cell *cell = new RTLIL::Cell; \ cell->name = name; \ cell->type = _type; \ - cell->connections()["\\" #_P1] = sig1; \ - cell->connections()["\\" #_P2] = sig2; \ + cell->set("\\" #_P1, sig1); \ + cell->set("\\" #_P2, sig2); \ add(cell); \ return cell; \ } \ @@ -1051,9 +1051,9 @@ DEF_METHOD(SafePmux, "$safe_pmux", 1) RTLIL::Cell *cell = new RTLIL::Cell; \ cell->name = name; \ cell->type = _type; \ - cell->connections()["\\" #_P1] = sig1; \ - cell->connections()["\\" #_P2] = sig2; \ - cell->connections()["\\" #_P3] = sig3; \ + cell->set("\\" #_P1, sig1); \ + cell->set("\\" #_P2, sig2); \ + cell->set("\\" #_P3, sig3); \ add(cell); \ return cell; \ } \ @@ -1067,10 +1067,10 @@ DEF_METHOD(SafePmux, "$safe_pmux", 1) RTLIL::Cell *cell = new RTLIL::Cell; \ cell->name = name; \ cell->type = _type; \ - cell->connections()["\\" #_P1] = sig1; \ - cell->connections()["\\" #_P2] = sig2; \ - cell->connections()["\\" #_P3] = sig3; \ - cell->connections()["\\" #_P4] = sig4; \ + cell->set("\\" #_P1, sig1); \ + cell->set("\\" #_P2, sig2); \ + cell->set("\\" #_P3, sig3); \ + cell->set("\\" #_P4, sig4); \ add(cell); \ return cell; \ } \ |