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author | Clifford Wolf <clifford@clifford.at> | 2013-12-01 14:07:44 +0100 |
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committer | Clifford Wolf <clifford@clifford.at> | 2013-12-01 14:07:44 +0100 |
commit | 73e28f0e3900cc071f13365748212f1ef10cf0e2 (patch) | |
tree | 87090019e28573b447a5ef17c1f4993e043da2f8 /manual/APPNOTE_011_Design_Investigation/memdemo.v | |
parent | 7295b25955ad6f185846e46e7a860e0b474f94a0 (diff) | |
download | yosys-73e28f0e3900cc071f13365748212f1ef10cf0e2.tar.gz yosys-73e28f0e3900cc071f13365748212f1ef10cf0e2.tar.bz2 yosys-73e28f0e3900cc071f13365748212f1ef10cf0e2.zip |
Progress on AppNote 011
Diffstat (limited to 'manual/APPNOTE_011_Design_Investigation/memdemo.v')
-rw-r--r-- | manual/APPNOTE_011_Design_Investigation/memdemo.v | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/manual/APPNOTE_011_Design_Investigation/memdemo.v b/manual/APPNOTE_011_Design_Investigation/memdemo.v new file mode 100644 index 000000000..babc24e29 --- /dev/null +++ b/manual/APPNOTE_011_Design_Investigation/memdemo.v @@ -0,0 +1,19 @@ +module memdemo(clk, d, y); + +input clk; +input [3:0] d; +output reg [3:0] y; + +integer i; +reg [1:0] s1, s2; +reg [3:0] mem [0:3]; + +always @(posedge clk) begin + for (i = 0; i < 4; i = i+1) + mem[i] <= mem[(i+1) % 4] + mem[(i+2) % 4]; + { s2, s1 } = d ? { s1, s2 } ^ d : 0; + mem[s1] <= d; + y <= mem[s2]; +end + +endmodule |