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author | Clifford Wolf <clifford@clifford.at> | 2014-09-06 10:15:47 +0200 |
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committer | Clifford Wolf <clifford@clifford.at> | 2014-09-06 10:15:47 +0200 |
commit | 652345c9cd41a6a93925477e44a6d7925b0d7584 (patch) | |
tree | b546123251d39df2ffd115fb0b8a08e57e7cf538 /manual/CHAPTER_Techmap.tex | |
parent | 01ef34c147dd3e3e3d13864f9c726727a4013207 (diff) | |
parent | 79cbf9067c07ed810b3466174278d77b9a05b46d (diff) | |
download | yosys-652345c9cd41a6a93925477e44a6d7925b0d7584.tar.gz yosys-652345c9cd41a6a93925477e44a6d7925b0d7584.tar.bz2 yosys-652345c9cd41a6a93925477e44a6d7925b0d7584.zip |
Merge pull request #38 from rubund/master
Corrected spelling mistakes found by lintian
Diffstat (limited to 'manual/CHAPTER_Techmap.tex')
-rw-r--r-- | manual/CHAPTER_Techmap.tex | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/manual/CHAPTER_Techmap.tex b/manual/CHAPTER_Techmap.tex index 26632d0b5..e5c7456c4 100644 --- a/manual/CHAPTER_Techmap.tex +++ b/manual/CHAPTER_Techmap.tex @@ -32,7 +32,7 @@ the Yosys source tree. Additional features have been added to {\tt techmap} to allow for conditional mapping of cells (see {\tt help techmap} or Sec.~\ref{cmd:techmap}). This can -for example be usefull if the target architecture supports hardware multipliers for +for example be useful if the target architecture supports hardware multipliers for certain bit-widths but not for others. A usual synthesis flow would first use the {\tt techmap} pass to directly map |