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authorAman Goel <amangoel@umich.edu>2018-10-01 09:09:40 -0400
committerGitHub <noreply@github.com>2018-10-01 09:09:40 -0400
commit33cb5e05be4fea9e09e1686a29a1f194a44c0e8a (patch)
tree8cf91fe789d3f1aec1eac277e594f8e7998b4e4a /manual/command-reference-manual.tex
parent75c1f8d241d67ebb6db56516b4f9fdb0a312aa0b (diff)
parent4d2917447cc14c590b4fee5ba36948fb4ee6884b (diff)
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Merge pull request #4 from YosysHQ/master
Merge with official repo
Diffstat (limited to 'manual/command-reference-manual.tex')
-rw-r--r--manual/command-reference-manual.tex4
1 files changed, 2 insertions, 2 deletions
diff --git a/manual/command-reference-manual.tex b/manual/command-reference-manual.tex
index 8af8ccdd0..fea2354e6 100644
--- a/manual/command-reference-manual.tex
+++ b/manual/command-reference-manual.tex
@@ -4421,13 +4421,13 @@ Write the current design to a Verilog file.
-nodec
32-bit constant values are by default dumped as decimal numbers,
- not bit pattern. This option decativates this feature and instead
+ not bit pattern. This option deactivates this feature and instead
will write out all constants in binary.
-nostr
Parameters and attributes that are specified as strings in the
original input will be output as strings by this back-end. This
- decativates this feature and instead will write string constants
+ deactivates this feature and instead will write string constants
as binary numbers.
-defparam