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authorPeter Crozier <peter@crozier.com>2020-06-03 17:19:28 +0100
committerGitHub <noreply@github.com>2020-06-03 17:19:28 +0100
commit0d3f7ea011288e1a1fadd4ae27f1e8a57d729053 (patch)
tree07bde0d9f492233728070234aed2abd45fbd464d /passes/cmds/blackbox.cc
parent17f050d3c6b8934141c42f96a3418de67a687b2c (diff)
parent46ed0db2ec883a4ce330c81f321511e36e35c0b3 (diff)
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Merge branch 'master' into struct
Diffstat (limited to 'passes/cmds/blackbox.cc')
-rw-r--r--passes/cmds/blackbox.cc26
1 files changed, 1 insertions, 25 deletions
diff --git a/passes/cmds/blackbox.cc b/passes/cmds/blackbox.cc
index 5c0405f15..b8297cd77 100644
--- a/passes/cmds/blackbox.cc
+++ b/passes/cmds/blackbox.cc
@@ -48,31 +48,7 @@ struct BlackboxPass : public Pass {
for (auto module : design->selected_whole_modules_warn())
{
- pool<Cell*> remove_cells;
- pool<Wire*> remove_wires;
-
- for (auto cell : module->cells())
- remove_cells.insert(cell);
-
- for (auto wire : module->wires())
- if (wire->port_id == 0)
- remove_wires.insert(wire);
-
- for (auto it = module->memories.begin(); it != module->memories.end(); ++it)
- delete it->second;
- module->memories.clear();
-
- for (auto it = module->processes.begin(); it != module->processes.end(); ++it)
- delete it->second;
- module->processes.clear();
-
- module->new_connections(std::vector<RTLIL::SigSig>());
-
- for (auto cell : remove_cells)
- module->remove(cell);
-
- module->remove(remove_wires);
-
+ module->makeblackbox();
module->set_bool_attribute(ID::blackbox);
}
}