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| author | Clifford Wolf <clifford@clifford.at> | 2014-10-11 10:46:19 +0200 |
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| committer | Clifford Wolf <clifford@clifford.at> | 2014-10-11 10:46:19 +0200 |
| commit | 0a651f112fe62fdf86e4b288988a9ed9ac90068d (patch) | |
| tree | 9dcbaf90568da099825d33241aaf131d1effa2f5 /passes/cmds/cover.cc | |
| parent | 93e6ebe771c675280742adf6905298301575d0a7 (diff) | |
| download | yosys-0a651f112fe62fdf86e4b288988a9ed9ac90068d.tar.gz yosys-0a651f112fe62fdf86e4b288988a9ed9ac90068d.tar.bz2 yosys-0a651f112fe62fdf86e4b288988a9ed9ac90068d.zip | |
Disabled vhdl2verilog command for win32 builds
Diffstat (limited to 'passes/cmds/cover.cc')
0 files changed, 0 insertions, 0 deletions