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authorClifford Wolf <clifford@clifford.at>2014-07-26 16:00:30 +0200
committerClifford Wolf <clifford@clifford.at>2014-07-26 16:00:30 +0200
commita84cb0493566f8f5eb610c6d7b67dda85b0f227b (patch)
treee4b1c2f97db2c317f8b986635141dfd7bb8e78d8 /passes/cmds/splitnets.cc
parentcd6574ecf652901573cbc6b89e1a59dd383ec496 (diff)
parentf8fdc47d3361c1a3445a9357ca26cfe75907d6b0 (diff)
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Merge automatic and manual code changes for new cell connections API
Diffstat (limited to 'passes/cmds/splitnets.cc')
-rw-r--r--passes/cmds/splitnets.cc2
1 files changed, 1 insertions, 1 deletions
diff --git a/passes/cmds/splitnets.cc b/passes/cmds/splitnets.cc
index 497d0a2a7..28575e7b4 100644
--- a/passes/cmds/splitnets.cc
+++ b/passes/cmds/splitnets.cc
@@ -134,7 +134,7 @@ struct SplitnetsPass : public Pass {
std::map<RTLIL::Wire*, std::set<int>> split_wires_at;
for (auto &c : module->cells)
- for (auto &p : c.second->connections_)
+ for (auto &p : c.second->connections())
{
if (!ct.cell_known(c.second->type))
continue;