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| author | Clifford Wolf <clifford@clifford.at> | 2014-08-02 18:58:40 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2014-08-02 18:58:40 +0200 |
| commit | 04727c7e0fb4c00b38999da192e4ada2a6f9474a (patch) | |
| tree | 5cedd8807a1d846d5bd6790bfde555b70b8c283b /passes/cmds | |
| parent | 768eb846c4473040dc07bf62ce631c8a21474ae8 (diff) | |
| download | yosys-04727c7e0fb4c00b38999da192e4ada2a6f9474a.tar.gz yosys-04727c7e0fb4c00b38999da192e4ada2a6f9474a.tar.bz2 yosys-04727c7e0fb4c00b38999da192e4ada2a6f9474a.zip | |
No implicit conversion from IdString to anything else
Diffstat (limited to 'passes/cmds')
| -rw-r--r-- | passes/cmds/design.cc | 2 | ||||
| -rw-r--r-- | passes/cmds/select.cc | 4 | ||||
| -rw-r--r-- | passes/cmds/show.cc | 2 |
3 files changed, 4 insertions, 4 deletions
diff --git a/passes/cmds/design.cc b/passes/cmds/design.cc index 260e7b5d9..9f800c31f 100644 --- a/passes/cmds/design.cc +++ b/passes/cmds/design.cc @@ -192,7 +192,7 @@ struct DesignPass : public Pass { for (auto mod : copy_src_modules) { - std::string trg_name = as_name.empty() ? std::string(mod->name) : RTLIL::escape_id(as_name); + std::string trg_name = as_name.empty() ? mod->name.str() : RTLIL::escape_id(as_name); if (copy_to_design->modules_.count(trg_name)) delete copy_to_design->modules_.at(trg_name); diff --git a/passes/cmds/select.cc b/passes/cmds/select.cc index b4f4d26ae..2d49e85ed 100644 --- a/passes/cmds/select.cc +++ b/passes/cmds/select.cc @@ -1080,7 +1080,7 @@ struct SelectPass : public Pass { RTLIL::IdString mod_name = RTLIL::escape_id(args[++argidx]); if (design->modules_.count(mod_name) == 0) log_cmd_error("No such module: %s\n", id2cstr(mod_name)); - design->selected_active_module = mod_name; + design->selected_active_module = mod_name.str(); got_module = true; continue; } @@ -1304,7 +1304,7 @@ struct CdPass : public Pass { if (design->modules_.count(design->selected_active_module) > 0) module = design->modules_.at(design->selected_active_module); if (module != NULL && module->cells_.count(modname) > 0) - modname = module->cells_.at(modname)->type; + modname = module->cells_.at(modname)->type.str(); } if (design->modules_.count(modname) > 0) { diff --git a/passes/cmds/show.cc b/passes/cmds/show.cc index bbc0ff44f..cbc4725f7 100644 --- a/passes/cmds/show.cc +++ b/passes/cmds/show.cc @@ -322,7 +322,7 @@ struct ShowWorker else if (it.second->port_output) all_sinks.insert(stringf("n%d", id2num(it.first))); } else { - wires_on_demand[stringf("n%d", id2num(it.first))] = it.first; + wires_on_demand[stringf("n%d", id2num(it.first))] = it.first.str(); } } |