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| author | Alberto Gonzalez <boqwxp@airmail.cc> | 2020-03-30 16:50:36 +0000 |
|---|---|---|
| committer | Alberto Gonzalez <boqwxp@airmail.cc> | 2020-03-30 16:50:36 +0000 |
| commit | 7fc0938bb6ca6bd15c3a94090c8fe3ded522601c (patch) | |
| tree | 1cc16416e499aa5d2655f65e6c1a4236646ddf52 /passes/cmds | |
| parent | 4681f02a6e91f933d35bcf5b718d5301d9b51b75 (diff) | |
| download | yosys-7fc0938bb6ca6bd15c3a94090c8fe3ded522601c.tar.gz yosys-7fc0938bb6ca6bd15c3a94090c8fe3ded522601c.tar.bz2 yosys-7fc0938bb6ca6bd15c3a94090c8fe3ded522601c.zip | |
Replace `RTLIL::id2cstr()` with `log_id()`.
Co-Authored-By: Eddie Hung <eddie@fpgeh.com>
Diffstat (limited to 'passes/cmds')
| -rw-r--r-- | passes/cmds/design.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/passes/cmds/design.cc b/passes/cmds/design.cc index 6081b3ad7..f807c0e58 100644 --- a/passes/cmds/design.cc +++ b/passes/cmds/design.cc @@ -200,7 +200,7 @@ struct DesignPass : public Pass { continue; } if (sel.selected_module(mod->name)) - log_cmd_error("Module %s is only partly selected.\n", RTLIL::id2cstr(mod->name)); + log_cmd_error("Module %s is only partly selected.\n", log_id(mod->name)); } if (import_mode) { |