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| author | Clifford Wolf <clifford@clifford.at> | 2014-08-08 14:49:06 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2014-08-08 14:56:03 +0200 |
| commit | 7067c43ec09cca176ad72378aa9ad868171c2471 (patch) | |
| tree | 87f8f6f78cc59a697e71ef4e075c2b770076d3bb /passes/fsm/fsm_export.cc | |
| parent | cb6ca08a53bfaa1b76798e6220bb1b267d49b235 (diff) | |
| download | yosys-7067c43ec09cca176ad72378aa9ad868171c2471.tar.gz yosys-7067c43ec09cca176ad72378aa9ad868171c2471.tar.bz2 yosys-7067c43ec09cca176ad72378aa9ad868171c2471.zip | |
Fixed "fsm -export"
Diffstat (limited to 'passes/fsm/fsm_export.cc')
| -rw-r--r-- | passes/fsm/fsm_export.cc | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/passes/fsm/fsm_export.cc b/passes/fsm/fsm_export.cc index cb762dc1a..b4a6b3f7b 100644 --- a/passes/fsm/fsm_export.cc +++ b/passes/fsm/fsm_export.cc @@ -56,13 +56,12 @@ void write_kiss2(struct RTLIL::Module *module, struct RTLIL::Cell *cell, std::st attr_it = cell->attributes.find("\\fsm_export"); if (!filename.empty()) { - kiss_name.assign(filename); + kiss_name.assign(filename); } else if (attr_it != cell->attributes.end() && attr_it->second.decode_string() != "") { kiss_name.assign(attr_it->second.decode_string()); } else { - kiss_name.assign(module->name.str()); - kiss_name.append('-' + cell->name.str() + ".kiss2"); + kiss_name.assign(log_id(module) + std::string("-") + log_id(cell) + ".kiss2"); } log("\n"); |