diff options
author | Miodrag Milanović <mmicko@gmail.com> | 2022-11-25 17:40:57 +0100 |
---|---|---|
committer | GitHub <noreply@github.com> | 2022-11-25 17:40:57 +0100 |
commit | 448a796e155416884c5fa45465da4e5ecc9f75a4 (patch) | |
tree | 164722d2699a98b149b740562f0f7c04a2628919 /passes/hierarchy/hierarchy.cc | |
parent | c55c514cdbd5a7968c17689876f2ced282071f9c (diff) | |
parent | f764cd16556b638b2857a3df9b77281c1bf872a0 (diff) | |
download | yosys-448a796e155416884c5fa45465da4e5ecc9f75a4.tar.gz yosys-448a796e155416884c5fa45465da4e5ecc9f75a4.tar.bz2 yosys-448a796e155416884c5fa45465da4e5ecc9f75a4.zip |
Merge pull request #3560 from YosysHQ/verific_conf
Support importing verilog configurations using Verific
Diffstat (limited to 'passes/hierarchy/hierarchy.cc')
-rw-r--r-- | passes/hierarchy/hierarchy.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/passes/hierarchy/hierarchy.cc b/passes/hierarchy/hierarchy.cc index eea6abb04..bf0137503 100644 --- a/passes/hierarchy/hierarchy.cc +++ b/passes/hierarchy/hierarchy.cc @@ -960,7 +960,7 @@ struct HierarchyPass : public Pass { if (top_mod == nullptr && !load_top_mod.empty()) { #ifdef YOSYS_ENABLE_VERIFIC if (verific_import_pending) { - verific_import(design, parameters, load_top_mod); + load_top_mod = verific_import(design, parameters, load_top_mod); top_mod = design->module(RTLIL::escape_id(load_top_mod)); } #endif |