aboutsummaryrefslogtreecommitdiffstats
path: root/passes/memory/memory_bram.cc
diff options
context:
space:
mode:
authorN. Engelhardt <nak@yosyshq.com>2022-08-25 11:41:12 +0200
committerGitHub <noreply@github.com>2022-08-25 11:41:12 +0200
commit8e640663d6b7ff84043068f48ed5f3cf7bff4321 (patch)
tree59001b194c2f573674c37352733427a3ec28a1c1 /passes/memory/memory_bram.cc
parent029c2785e810fda0ccc5abbb6057af760f2fc6f3 (diff)
parent9465b2af95a146f514fc1e0b2d31bc3d9a233fb7 (diff)
downloadyosys-8e640663d6b7ff84043068f48ed5f3cf7bff4321.tar.gz
yosys-8e640663d6b7ff84043068f48ed5f3cf7bff4321.tar.bz2
yosys-8e640663d6b7ff84043068f48ed5f3cf7bff4321.zip
Merge pull request #3457 from KrystalDelusion/docs_width
Diffstat (limited to 'passes/memory/memory_bram.cc')
-rw-r--r--passes/memory/memory_bram.cc3
1 files changed, 2 insertions, 1 deletions
diff --git a/passes/memory/memory_bram.cc b/passes/memory/memory_bram.cc
index b1f45d5fc..1cb50b3ea 100644
--- a/passes/memory/memory_bram.cc
+++ b/passes/memory/memory_bram.cc
@@ -1245,7 +1245,8 @@ struct MemoryBramPass : public Pass {
log("greater than 1 share the same configuration bit.\n");
log("\n");
log("Using the same bram name in different bram blocks will create different variants\n");
- log("of the bram. Verilog configuration parameters for the bram are created as needed.\n");
+ log("of the bram. Verilog configuration parameters for the bram are created as\n");
+ log("needed.\n");
log("\n");
log("It is also possible to create variants by repeating statements in the bram block\n");
log("and appending '@<label>' to the individual statements.\n");