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| author | Marcelina Kościelnicka <mwk@0x04.net> | 2021-07-31 23:21:37 +0200 |
|---|---|---|
| committer | Marcelina Kościelnicka <mwk@0x04.net> | 2021-08-11 00:04:16 +0200 |
| commit | e6f3d1c225abecf736782f43af4f36526c63f4c5 (patch) | |
| tree | 5753dd1d51863623bbcb4e1ecc716171f99a6db0 /passes/memory/memory_dff.cc | |
| parent | 681a1c07e52dc82449501f4939e6312f593449bd (diff) | |
| download | yosys-e6f3d1c225abecf736782f43af4f36526c63f4c5.tar.gz yosys-e6f3d1c225abecf736782f43af4f36526c63f4c5.tar.bz2 yosys-e6f3d1c225abecf736782f43af4f36526c63f4c5.zip | |
kernel/mem: Introduce transparency masks.
Diffstat (limited to 'passes/memory/memory_dff.cc')
| -rw-r--r-- | passes/memory/memory_dff.cc | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/passes/memory/memory_dff.cc b/passes/memory/memory_dff.cc index 5cfb3f48a..e6b4b2400 100644 --- a/passes/memory/memory_dff.cc +++ b/passes/memory/memory_dff.cc @@ -143,7 +143,8 @@ struct MemoryDffWorker port.addr = ff.sig_d; port.clk_enable = true; port.clk_polarity = ff.pol_clk; - port.transparent = true; + for (int i = 0; i < GetSize(mem.wr_ports); i++) + port.transparency_mask[i] = true; mem.emit(); log("merged address FF to cell.\n"); } |