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authorEddie Hung <eddie@fpgeh.com>2019-07-18 15:45:25 -0700
committerEddie Hung <eddie@fpgeh.com>2019-07-18 15:45:25 -0700
commit42e40dbd0a513d430ff0a463f9a80dedfbbf51f5 (patch)
tree5cf69498d43b8d225e28cf5562f91c3a4a94f814 /passes/memory
parent09411dd996f75dbce22a6f6979b7d61b0dae24f7 (diff)
parente66e8fb59d8443c8d55c1185d6b2ce889a35357d (diff)
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Merge remote-tracking branch 'origin/master' into ice40dsp
Diffstat (limited to 'passes/memory')
-rw-r--r--passes/memory/memory_bram.cc4
1 files changed, 4 insertions, 0 deletions
diff --git a/passes/memory/memory_bram.cc b/passes/memory/memory_bram.cc
index ddc56d9b5..aa8f94149 100644
--- a/passes/memory/memory_bram.cc
+++ b/passes/memory/memory_bram.cc
@@ -68,6 +68,10 @@ struct rules_t
if (groups != GetSize(transp)) log_error("Bram %s variant %d has %d groups but only %d entries in 'transp'.\n", log_id(name), variant, groups, GetSize(transp));
if (groups != GetSize(clocks)) log_error("Bram %s variant %d has %d groups but only %d entries in 'clocks'.\n", log_id(name), variant, groups, GetSize(clocks));
if (groups != GetSize(clkpol)) log_error("Bram %s variant %d has %d groups but only %d entries in 'clkpol'.\n", log_id(name), variant, groups, GetSize(clkpol));
+
+ int group = 0;
+ for (auto e : enable)
+ if (e > dbits) log_error("Bram %s variant %d group %d has %d enable bits but only %d dbits.\n", log_id(name), variant, group, e, dbits);
}
vector<portinfo_t> make_portinfos() const