diff options
| author | Eddie Hung <eddie@fpgeh.com> | 2019-08-07 11:09:17 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-08-07 11:09:17 -0700 |
| commit | 48d0f994064557dc0832748e17133ee2eac88cbf (patch) | |
| tree | ff80fabc1b2196356dd3ebf0536b2d75e145282d /passes/opt/opt_lut.cc | |
| parent | ee7c970367c68fe1a02a237ed01f2845a03cf9b2 (diff) | |
| download | yosys-48d0f994064557dc0832748e17133ee2eac88cbf.tar.gz yosys-48d0f994064557dc0832748e17133ee2eac88cbf.tar.bz2 yosys-48d0f994064557dc0832748e17133ee2eac88cbf.zip | |
stoi -> atoi
Diffstat (limited to 'passes/opt/opt_lut.cc')
| -rw-r--r-- | passes/opt/opt_lut.cc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/passes/opt/opt_lut.cc b/passes/opt/opt_lut.cc index 6d97c0bb4..587ef878a 100644 --- a/passes/opt/opt_lut.cc +++ b/passes/opt/opt_lut.cc @@ -555,14 +555,14 @@ struct OptLutPass : public Pass { if (conn_tokens.size() != 2) log_cmd_error("Invalid format of -dlogic signal mapping.\n"); IdString logic_port = "\\" + conn_tokens[0]; - int lut_input = std::stoi(conn_tokens[1]); + int lut_input = atoi(conn_tokens[1].c_str()); dlogic[type][lut_input] = logic_port; } continue; } if (args[argidx] == "-limit" && argidx + 1 < args.size()) { - limit = std::stoi(args[++argidx]); + limit = atoi(args[++argidx].c_str()); continue; } break; |