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authorClifford Wolf <clifford@clifford.at>2014-07-23 16:09:27 +0200
committerClifford Wolf <clifford@clifford.at>2014-07-23 19:34:51 +0200
commita62c21c9c64ad5b3e0dae5d4ee4857425f73068e (patch)
tree81cbbd4bbd869af6290eb0e19e4cfdfbc9555c03 /passes/opt/opt_muxtree.cc
parent54552f680938fd933b07fa38597937ba6d367be7 (diff)
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Removed RTLIL::SigSpec::expand() method
Diffstat (limited to 'passes/opt/opt_muxtree.cc')
-rw-r--r--passes/opt/opt_muxtree.cc12
1 files changed, 7 insertions, 5 deletions
diff --git a/passes/opt/opt_muxtree.cc b/passes/opt/opt_muxtree.cc
index 61147f67a..dfcd55126 100644
--- a/passes/opt/opt_muxtree.cc
+++ b/passes/opt/opt_muxtree.cc
@@ -36,7 +36,11 @@ struct OptMuxtreeWorker
SigMap assign_map;
int removed_count;
- typedef std::pair<RTLIL::Wire*,int> bitDef_t;
+ struct bitDef_t : public std::pair<RTLIL::Wire*, int> {
+ bitDef_t() : std::pair<RTLIL::Wire*, int>(NULL, 0) { }
+ bitDef_t(const RTLIL::SigBit &bit) : std::pair<RTLIL::Wire*, int>(bit.wire, bit.offset) { }
+ };
+
struct bitinfo_t {
int num;
@@ -259,10 +263,8 @@ struct OptMuxtreeWorker
{
std::vector<int> results;
assign_map.apply(sig);
- sig.expand();
- for (auto &c : sig.chunks())
- if (c.wire != NULL) {
- bitDef_t bit(c.wire, c.offset);
+ for (auto &bit : sig)
+ if (bit.wire != NULL) {
if (bit2num.count(bit) == 0) {
bitinfo_t info;
info.num = bit2info.size();