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author | Clifford Wolf <clifford@clifford.at> | 2019-08-10 09:52:14 +0200 |
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committer | GitHub <noreply@github.com> | 2019-08-10 09:52:14 +0200 |
commit | f54bf1631ff37a83733c162e6ebd188c1d5ea18f (patch) | |
tree | 21d24c49c50f17a53a9bc8fe4118752ff845e55d /passes/opt/opt_muxtree.cc | |
parent | 4f812131653ebea06e3d1c3e7599492992edb771 (diff) | |
parent | 6d77236f3845cd8785e7bdd4da3c5ef966be6043 (diff) | |
download | yosys-f54bf1631ff37a83733c162e6ebd188c1d5ea18f.tar.gz yosys-f54bf1631ff37a83733c162e6ebd188c1d5ea18f.tar.bz2 yosys-f54bf1631ff37a83733c162e6ebd188c1d5ea18f.zip |
Merge pull request #1258 from YosysHQ/eddie/cleanup
Cleanup a few barnacles across codebase
Diffstat (limited to 'passes/opt/opt_muxtree.cc')
-rw-r--r-- | passes/opt/opt_muxtree.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/passes/opt/opt_muxtree.cc b/passes/opt/opt_muxtree.cc index 6511e091b..4b96fe524 100644 --- a/passes/opt/opt_muxtree.cc +++ b/passes/opt/opt_muxtree.cc @@ -84,7 +84,7 @@ struct OptMuxtreeWorker // .const_deactivated for (auto cell : module->cells()) { - if (cell->type == "$mux" || cell->type == "$pmux") + if (cell->type.in("$mux", "$pmux")) { RTLIL::SigSpec sig_a = cell->getPort("\\A"); RTLIL::SigSpec sig_b = cell->getPort("\\B"); |