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authorEddie Hung <eddie@fpgeh.com>2019-08-12 11:32:10 -0700
committerEddie Hung <eddie@fpgeh.com>2019-08-12 11:32:10 -0700
commitf890cfb63b71ae7b09e19c290ec70c358dcbe9cd (patch)
treeea7602c378e794b5e7448361ba2a41d2d6a49c13 /passes/opt/opt_muxtree.cc
parentab1d63a56595f11e10a5326bd83ce84d08badabe (diff)
parent78b30bbb1102047585d1a2eac89b1c7f5ca7344e (diff)
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Merge remote-tracking branch 'origin/master' into xc7dsp
Diffstat (limited to 'passes/opt/opt_muxtree.cc')
-rw-r--r--passes/opt/opt_muxtree.cc2
1 files changed, 1 insertions, 1 deletions
diff --git a/passes/opt/opt_muxtree.cc b/passes/opt/opt_muxtree.cc
index 6511e091b..4b96fe524 100644
--- a/passes/opt/opt_muxtree.cc
+++ b/passes/opt/opt_muxtree.cc
@@ -84,7 +84,7 @@ struct OptMuxtreeWorker
// .const_deactivated
for (auto cell : module->cells())
{
- if (cell->type == "$mux" || cell->type == "$pmux")
+ if (cell->type.in("$mux", "$pmux"))
{
RTLIL::SigSpec sig_a = cell->getPort("\\A");
RTLIL::SigSpec sig_b = cell->getPort("\\B");