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| author | Eddie Hung <eddie@fpgeh.com> | 2019-07-19 13:20:45 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-07-19 13:20:45 -0700 |
| commit | 31b0002e8c0e1b7a8ad054e02b1200c03461b581 (patch) | |
| tree | 6646e721439f693bc7ba826487ca5c5d27a5856f /passes/opt | |
| parent | bcd802718256efbacaf0a73f99347af40b61e464 (diff) | |
| download | yosys-31b0002e8c0e1b7a8ad054e02b1200c03461b581.tar.gz yosys-31b0002e8c0e1b7a8ad054e02b1200c03461b581.tar.bz2 yosys-31b0002e8c0e1b7a8ad054e02b1200c03461b581.zip | |
Remove "top" from message
Diffstat (limited to 'passes/opt')
| -rw-r--r-- | passes/opt/wreduce.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/passes/opt/wreduce.cc b/passes/opt/wreduce.cc index dff1c5370..23e14f7f5 100644 --- a/passes/opt/wreduce.cc +++ b/passes/opt/wreduce.cc @@ -395,7 +395,7 @@ struct WreduceWorker } if (bits_removed) { - log("Removed top %d bits (of %d) from port Y of cell %s.%s (%s).\n", + log("Removed %d bits (of %d) from port Y of cell %s.%s (%s).\n", bits_removed, GetSize(sig) + bits_removed, log_id(module), log_id(cell), log_id(cell->type)); cell->setPort("\\Y", sig); did_something = true; |