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| author | Eddie Hung <eddie@fpgeh.com> | 2020-01-17 15:37:52 -0800 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2020-01-17 15:37:52 -0800 |
| commit | 4985318263a8113563c9c62c60a9d4d6ee0a4f4e (patch) | |
| tree | 50e58b28aa612797ac882bca022530efb6366e64 /passes/pmgen/ice40_dsp.cc | |
| parent | 6692e5d558e7c7277153b7a3bd1623af0e57405d (diff) | |
| download | yosys-4985318263a8113563c9c62c60a9d4d6ee0a4f4e.tar.gz yosys-4985318263a8113563c9c62c60a9d4d6ee0a4f4e.tar.bz2 yosys-4985318263a8113563c9c62c60a9d4d6ee0a4f4e.zip | |
ice40_dsp: add default values for parameters
Diffstat (limited to 'passes/pmgen/ice40_dsp.cc')
| -rw-r--r-- | passes/pmgen/ice40_dsp.cc | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/passes/pmgen/ice40_dsp.cc b/passes/pmgen/ice40_dsp.cc index f60e67158..202a43f0c 100644 --- a/passes/pmgen/ice40_dsp.cc +++ b/passes/pmgen/ice40_dsp.cc @@ -73,11 +73,11 @@ void create_ice40_dsp(ice40_dsp_pm &pm) // SB_MAC16 Input Interface SigSpec A = st.sigA; - A.extend_u0(16, st.mul->getParam(ID(A_SIGNED)).as_bool()); + A.extend_u0(16, st.mul->connections_.at(ID(A_SIGNED), State::S0).as_bool()); log_assert(GetSize(A) == 16); SigSpec B = st.sigB; - B.extend_u0(16, st.mul->getParam(ID(B_SIGNED)).as_bool()); + B.extend_u0(16, st.mul->connections_.at(ID(B_SIGNED), State::S0).as_bool()); log_assert(GetSize(B) == 16); SigSpec CD = st.sigCD; @@ -248,8 +248,8 @@ void create_ice40_dsp(ice40_dsp_pm &pm) cell->setParam(ID(BOTADDSUB_CARRYSELECT), Const(0, 2)); cell->setParam(ID(MODE_8x8), State::S0); - cell->setParam(ID(A_SIGNED), st.mul->getParam(ID(A_SIGNED)).as_bool()); - cell->setParam(ID(B_SIGNED), st.mul->getParam(ID(B_SIGNED)).as_bool()); + cell->setParam(ID(A_SIGNED), st.mul->parameters.at(ID(A_SIGNED), State::S0).as_bool()); + cell->setParam(ID(B_SIGNED), st.mul->parameters.at(ID(B_SIGNED), State::S0).as_bool()); if (st.ffO) { if (st.o_lo) |