diff options
| author | Eddie Hung <eddie@fpgeh.com> | 2019-07-19 10:57:32 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-07-19 10:57:32 -0700 |
| commit | 9ad11ea2cc25f764bcd4e27dfc12c0f8041cb48a (patch) | |
| tree | 67adaf365846a143a6acbcccd767bb56ff253447 /passes/pmgen/xilinx_dsp.cc | |
| parent | 8f0e796be131c2a47694e786ff901cc9970917c6 (diff) | |
| download | yosys-9ad11ea2cc25f764bcd4e27dfc12c0f8041cb48a.tar.gz yosys-9ad11ea2cc25f764bcd4e27dfc12c0f8041cb48a.tar.bz2 yosys-9ad11ea2cc25f764bcd4e27dfc12c0f8041cb48a.zip | |
Fine tune ice40_dsp.pmg, add support for packing subsets of registers
Diffstat (limited to 'passes/pmgen/xilinx_dsp.cc')
| -rw-r--r-- | passes/pmgen/xilinx_dsp.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/passes/pmgen/xilinx_dsp.cc b/passes/pmgen/xilinx_dsp.cc index c71ac5ef8..d87d63670 100644 --- a/passes/pmgen/xilinx_dsp.cc +++ b/passes/pmgen/xilinx_dsp.cc @@ -39,7 +39,7 @@ void pack_xilinx_dsp(xilinx_dsp_pm &pm) log("dsp: %s\n", log_id(st.dsp, "--")); log("ffP: %s\n", log_id(st.ffP, "--")); log("muxP: %s\n", log_id(st.muxP, "--")); - log("P_used: %s\n", log_signal(st.P_used)); + log("sigPused: %s\n", log_signal(st.sigPused)); log_module(pm.module); #endif |