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authorEddie Hung <eddie@fpgeh.com>2019-08-08 12:56:05 -0700
committerEddie Hung <eddie@fpgeh.com>2019-08-08 12:56:05 -0700
commit2c0be7aa5d7dcdf18678fb7b09ba1b3b5dd00998 (patch)
tree2dce8af3214dbbc0445b36babc88b9ffecac74a3 /passes/pmgen/xilinx_dsp.pmg
parent162eab6b7422754c4c88d794f8024cfc1e03a419 (diff)
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Rework ice40_dsp to map to SB_MAC16 earlier, and check before packing
Diffstat (limited to 'passes/pmgen/xilinx_dsp.pmg')
-rw-r--r--passes/pmgen/xilinx_dsp.pmg2
1 files changed, 1 insertions, 1 deletions
diff --git a/passes/pmgen/xilinx_dsp.pmg b/passes/pmgen/xilinx_dsp.pmg
index 6fd1207fa..8abae9316 100644
--- a/passes/pmgen/xilinx_dsp.pmg
+++ b/passes/pmgen/xilinx_dsp.pmg
@@ -44,7 +44,7 @@ code clock
endcode
// Extract the bits of P that actually have a consumer
-// (as opposed to being a sign extension)
+// (as opposed to being a dummy)
code sigPused
SigSpec P = port(dsp, \P);
int i;