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author | Eddie Hung <eddie@fpgeh.com> | 2019-09-05 11:46:38 -0700 |
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committer | Eddie Hung <eddie@fpgeh.com> | 2019-09-05 11:46:38 -0700 |
commit | fe5a1324c953cee51774228723e73a2ecac9a45b (patch) | |
tree | 05796d367056eb409e6b2cde1e2a495d493f61cc /passes/pmgen/xilinx_dsp.pmg | |
parent | 447a31e75d7bd77c0108eb0c76b9749340b10db4 (diff) | |
download | yosys-fe5a1324c953cee51774228723e73a2ecac9a45b.tar.gz yosys-fe5a1324c953cee51774228723e73a2ecac9a45b.tar.bz2 yosys-fe5a1324c953cee51774228723e73a2ecac9a45b.zip |
Do not make ff[MP]mux semioptional, use sigmap
Diffstat (limited to 'passes/pmgen/xilinx_dsp.pmg')
-rw-r--r-- | passes/pmgen/xilinx_dsp.pmg | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/passes/pmgen/xilinx_dsp.pmg b/passes/pmgen/xilinx_dsp.pmg index a2a6f2ef0..d7632da6f 100644 --- a/passes/pmgen/xilinx_dsp.pmg +++ b/passes/pmgen/xilinx_dsp.pmg @@ -120,7 +120,7 @@ match ffMmux filter port(ffMmux, AB) == sigM.extract(0, GetSize(port(ffMmux, \Y))) filter nusers(sigM.extract_end(GetSize(port(ffMmux, AB)))) <= 1 set ffMmuxAB AB - semioptional + optional endmatch code sigM @@ -207,12 +207,12 @@ match ffPmux filter port(ffPmux, AB) == sigP.extract(0, GetSize(port(ffPmux, \Y))) filter nusers(sigP.extract_end(GetSize(port(ffPmux, AB)))) <= 1 set ffPmuxAB AB - semioptional + optional endmatch code sigP if (ffPmux) - sigP = port(ffPmux, \Y); + sigP.replace(port(ffPmux, ffPmuxAB), port(ffPmux, \Y)); endcode match ffP @@ -243,6 +243,9 @@ code ffP sigP clock sigP.replace(port(ffP, \D), port(ffP, \Q)); } + // Cannot have ffPmux enable mux without ffP + else if (ffPmux) + reject; endcode match postAddMux |