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| author | Clifford Wolf <clifford@clifford.at> | 2014-09-27 16:17:53 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2014-09-27 16:17:53 +0200 |
| commit | f9a307a50b5ce67b67d2b53e8c1334ea23ffd997 (patch) | |
| tree | 5a591d0d03c9623abc02aaa3773458193f67ffa1 /passes/proc/proc_arst.cc | |
| parent | bcd2625a8247ddbcf4a8a819eadcb03846537223 (diff) | |
| download | yosys-f9a307a50b5ce67b67d2b53e8c1334ea23ffd997.tar.gz yosys-f9a307a50b5ce67b67d2b53e8c1334ea23ffd997.tar.bz2 yosys-f9a307a50b5ce67b67d2b53e8c1334ea23ffd997.zip | |
namespace Yosys
Diffstat (limited to 'passes/proc/proc_arst.cc')
| -rw-r--r-- | passes/proc/proc_arst.cc | 15 |
1 files changed, 10 insertions, 5 deletions
diff --git a/passes/proc/proc_arst.cc b/passes/proc/proc_arst.cc index f11b328f0..d7cb38bcd 100644 --- a/passes/proc/proc_arst.cc +++ b/passes/proc/proc_arst.cc @@ -23,10 +23,14 @@ #include <stdlib.h> #include <stdio.h> -// defined in proc_clean.cc +YOSYS_NAMESPACE_BEGIN extern void proc_clean_case(RTLIL::CaseRule *cs, bool &did_something, int &count, int max_depth); +YOSYS_NAMESPACE_END -static bool check_signal(RTLIL::Module *mod, RTLIL::SigSpec signal, RTLIL::SigSpec ref, bool &polarity) +USING_YOSYS_NAMESPACE +PRIVATE_NAMESPACE_BEGIN + +bool check_signal(RTLIL::Module *mod, RTLIL::SigSpec signal, RTLIL::SigSpec ref, bool &polarity) { if (signal.size() != 1) return false; @@ -81,7 +85,7 @@ static bool check_signal(RTLIL::Module *mod, RTLIL::SigSpec signal, RTLIL::SigSp return false; } -static void apply_const(RTLIL::Module *mod, const RTLIL::SigSpec rspec, RTLIL::SigSpec &rval, RTLIL::CaseRule *cs, RTLIL::SigSpec const_sig, bool polarity, bool unknown) +void apply_const(RTLIL::Module *mod, const RTLIL::SigSpec rspec, RTLIL::SigSpec &rval, RTLIL::CaseRule *cs, RTLIL::SigSpec const_sig, bool polarity, bool unknown) { for (auto &action : cs->actions) { if (unknown) @@ -114,7 +118,7 @@ static void apply_const(RTLIL::Module *mod, const RTLIL::SigSpec rspec, RTLIL::S } } -static void eliminate_const(RTLIL::Module *mod, RTLIL::CaseRule *cs, RTLIL::SigSpec const_sig, bool polarity) +void eliminate_const(RTLIL::Module *mod, RTLIL::CaseRule *cs, RTLIL::SigSpec const_sig, bool polarity) { for (auto sw : cs->switches) { bool this_polarity = polarity; @@ -149,7 +153,7 @@ static void eliminate_const(RTLIL::Module *mod, RTLIL::CaseRule *cs, RTLIL::SigS } } -static void proc_arst(RTLIL::Module *mod, RTLIL::Process *proc, SigMap &assign_map) +void proc_arst(RTLIL::Module *mod, RTLIL::Process *proc, SigMap &assign_map) { restart_proc_arst: if (proc->root_case.switches.size() != 1) @@ -280,3 +284,4 @@ struct ProcArstPass : public Pass { } } ProcArstPass; +PRIVATE_NAMESPACE_END |