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author | Clifford Wolf <clifford@clifford.at> | 2013-03-01 09:26:29 +0100 |
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committer | Clifford Wolf <clifford@clifford.at> | 2013-03-01 09:26:29 +0100 |
commit | f952309c81afcb467eb367ec519ec12876fb0983 (patch) | |
tree | eb56d924efba8b36cbe03512e163c1f79e3744ea /passes/proc/proc_dff.cc | |
parent | 36954471a6f385bda835b2a4e5751764bb146aac (diff) | |
download | yosys-f952309c81afcb467eb367ec519ec12876fb0983.tar.gz yosys-f952309c81afcb467eb367ec519ec12876fb0983.tar.bz2 yosys-f952309c81afcb467eb367ec519ec12876fb0983.zip |
Added help messages to proc_* passes
Diffstat (limited to 'passes/proc/proc_dff.cc')
-rw-r--r-- | passes/proc/proc_dff.cc | 24 |
1 files changed, 18 insertions, 6 deletions
diff --git a/passes/proc/proc_dff.cc b/passes/proc/proc_dff.cc index ccacc72d2..93b90006c 100644 --- a/passes/proc/proc_dff.cc +++ b/passes/proc/proc_dff.cc @@ -161,18 +161,30 @@ static void proc_dff(RTLIL::Module *mod, RTLIL::Process *proc, ConstEval &ce) } struct ProcDffPass : public Pass { - ProcDffPass() : Pass("proc_dff") { } + ProcDffPass() : Pass("proc_dff", "extract flip-flops from processes") { } + virtual void help() + { + // |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---| + log("\n"); + log(" proc_dff [selection]\n"); + log("\n"); + log("This pass identifies flip-flops in the processes and converts then to\n"); + log("flip-flop cells.\n"); + log("\n"); + } virtual void execute(std::vector<std::string> args, RTLIL::Design *design) { log_header("Executing PROC_DFF pass (convert process syncs to FFs).\n"); extra_args(args, 1, design); - for (auto &mod_it : design->modules) { - ConstEval ce(mod_it.second); - for (auto &proc_it : mod_it.second->processes) - proc_dff(mod_it.second, proc_it.second, ce); - } + for (auto &mod_it : design->modules) + if (design->selected(mod_it.second)) { + ConstEval ce(mod_it.second); + for (auto &proc_it : mod_it.second->processes) + if (design->selected(mod_it.second, proc_it.second)) + proc_dff(mod_it.second, proc_it.second, ce); + } } } ProcDffPass; |