diff options
| author | Marcelina Kościelnicka <mwk@0x04.net> | 2021-02-23 00:21:46 +0100 |
|---|---|---|
| committer | Marcelina Kościelnicka <mwk@0x04.net> | 2021-03-08 20:16:29 +0100 |
| commit | 4e03865d5bf3fafe0bd3735c88431675d53d2663 (patch) | |
| tree | 7ef637bd0526b498d32386bc1c79c671a02af7f0 /passes/proc/proc_dlatch.cc | |
| parent | c00a29296c8d3446c7cfe253080c7e33358219b0 (diff) | |
| download | yosys-4e03865d5bf3fafe0bd3735c88431675d53d2663.tar.gz yosys-4e03865d5bf3fafe0bd3735c88431675d53d2663.tar.bz2 yosys-4e03865d5bf3fafe0bd3735c88431675d53d2663.zip | |
Add support for memory writes in processes.
Diffstat (limited to 'passes/proc/proc_dlatch.cc')
| -rw-r--r-- | passes/proc/proc_dlatch.cc | 7 |
1 files changed, 1 insertions, 6 deletions
diff --git a/passes/proc/proc_dlatch.cc b/passes/proc/proc_dlatch.cc index 7b8c05b21..03d072cf4 100644 --- a/passes/proc/proc_dlatch.cc +++ b/passes/proc/proc_dlatch.cc @@ -342,7 +342,6 @@ struct proc_dlatch_db_t void proc_dlatch(proc_dlatch_db_t &db, RTLIL::Process *proc) { - std::vector<RTLIL::SyncRule*> new_syncs; RTLIL::SigSig latches_bits, nolatches_bits; dict<SigBit, SigBit> latches_out_in; dict<SigBit, int> latches_hold; @@ -351,7 +350,6 @@ void proc_dlatch(proc_dlatch_db_t &db, RTLIL::Process *proc) for (auto sr : proc->syncs) { if (sr->type != RTLIL::SyncType::STa) { - new_syncs.push_back(sr); continue; } @@ -373,8 +371,7 @@ void proc_dlatch(proc_dlatch_db_t &db, RTLIL::Process *proc) for (int i = 0; i < GetSize(ss.first); i++) latches_out_in[ss.first[i]] = ss.second[i]; } - - delete sr; + sr->actions.clear(); } latches_out_in.sort(); @@ -441,8 +438,6 @@ void proc_dlatch(proc_dlatch_db_t &db, RTLIL::Process *proc) offset += width; } - - new_syncs.swap(proc->syncs); } struct ProcDlatchPass : public Pass { |