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| author | Eddie Hung <eddie@fpgeh.com> | 2020-01-02 16:14:04 -0800 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2020-01-02 16:14:04 -0800 |
| commit | a050f9c80887f9962c326566c1f351c991e0c8b0 (patch) | |
| tree | 77c252391fabde31d9d323a80988d2bd761562b6 /passes/techmap/abc9_ops.cc | |
| parent | 4eaf41505256fc6f20065b3e5a64d74e607b15e7 (diff) | |
| download | yosys-a050f9c80887f9962c326566c1f351c991e0c8b0.tar.gz yosys-a050f9c80887f9962c326566c1f351c991e0c8b0.tar.bz2 yosys-a050f9c80887f9962c326566c1f351c991e0c8b0.zip | |
Remove a few log_{push,pop}()
Diffstat (limited to 'passes/techmap/abc9_ops.cc')
| -rw-r--r-- | passes/techmap/abc9_ops.cc | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/passes/techmap/abc9_ops.cc b/passes/techmap/abc9_ops.cc index dcb8a8a78..a4059bd4d 100644 --- a/passes/techmap/abc9_ops.cc +++ b/passes/techmap/abc9_ops.cc @@ -436,7 +436,6 @@ struct Abc9OpsPass : public Pass { void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE { log_header(design, "Executing ABC9_OPS pass (helper functions for ABC9).\n"); - log_push(); bool break_scc_mode = false; bool unbreak_scc_mode = false; |