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| author | Eddie Hung <eddie@fpgeh.com> | 2020-01-10 12:38:49 -0800 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2020-01-10 12:38:49 -0800 |
| commit | e0af812180528c45e79291209e2e3726c98b80ae (patch) | |
| tree | ddaf1dad33b2b0f181c8289c30d2d3d1efaa966f /passes/techmap/abc9_ops.cc | |
| parent | b2259a920165930261050065d870d03fc7573346 (diff) | |
| download | yosys-e0af812180528c45e79291209e2e3726c98b80ae.tar.gz yosys-e0af812180528c45e79291209e2e3726c98b80ae.tar.bz2 yosys-e0af812180528c45e79291209e2e3726c98b80ae.zip | |
abc9_ops -prep_times: update comment
Diffstat (limited to 'passes/techmap/abc9_ops.cc')
| -rw-r--r-- | passes/techmap/abc9_ops.cc | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/passes/techmap/abc9_ops.cc b/passes/techmap/abc9_ops.cc index 4d49bb4d2..14b3f6c43 100644 --- a/passes/techmap/abc9_ops.cc +++ b/passes/techmap/abc9_ops.cc @@ -485,9 +485,9 @@ void prep_times(RTLIL::Design *design) continue; if (!inst_module->get_blackbox_attribute()) continue; - // Flop inputs cannot have required times - // (required time should be captured by flop box) - // TODO: enforce this + // Only flop boxes are not combinatorial and may have required times, + // however those times are captured by this flop box, no need to + // add delay boxes if (cell->attributes.count(ID(abc9_box_id))) continue; boxes.emplace_back(cell); @@ -566,6 +566,7 @@ void write_box(RTLIL::Module *module, const std::string &src, const std::string ofs << "$__ABC9_DELAY@" << d << " " << ABC9_DELAY_BASE_ID + d << " 0 1 1" << std::endl; ofs << d << std::endl; } + module->attributes.erase(it); } ofs.close(); |