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authorEddie Hung <eddie@fpgeh.com>2019-08-15 10:25:54 -0700
committerEddie Hung <eddie@fpgeh.com>2019-08-15 10:25:54 -0700
commit02dead2e60e802986ac80137667e399d45233cdc (patch)
tree13dc1fa37096c7c83159b6403ff703e213be197d /passes/techmap/dffinit.cc
parent467c34eff05bd62fd64c35f07fe140f33edf4511 (diff)
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ID(\\.*) -> ID(.*)
Diffstat (limited to 'passes/techmap/dffinit.cc')
-rw-r--r--passes/techmap/dffinit.cc10
1 files changed, 5 insertions, 5 deletions
diff --git a/passes/techmap/dffinit.cc b/passes/techmap/dffinit.cc
index 8962446c8..cf9301442 100644
--- a/passes/techmap/dffinit.cc
+++ b/passes/techmap/dffinit.cc
@@ -99,8 +99,8 @@ struct DffinitPass : public Pass {
pool<SigBit> used_bits;
for (auto wire : module->selected_wires()) {
- if (wire->attributes.count(ID(\\init))) {
- Const value = wire->attributes.at(ID(\\init));
+ if (wire->attributes.count(ID(init))) {
+ Const value = wire->attributes.at(ID(init));
for (int i = 0; i < min(GetSize(value), GetSize(wire)); i++)
if (value[i] != State::Sx)
init_bits[sigmap(SigBit(wire, i))] = value[i];
@@ -161,8 +161,8 @@ struct DffinitPass : public Pass {
}
for (auto wire : module->selected_wires())
- if (wire->attributes.count(ID(\\init))) {
- Const &value = wire->attributes.at(ID(\\init));
+ if (wire->attributes.count(ID(init))) {
+ Const &value = wire->attributes.at(ID(init));
bool do_cleanup = true;
for (int i = 0; i < min(GetSize(value), GetSize(wire)); i++) {
SigBit bit = sigmap(SigBit(wire, i));
@@ -173,7 +173,7 @@ struct DffinitPass : public Pass {
}
if (do_cleanup) {
log("Removing init attribute from wire %s.%s.\n", log_id(module), log_id(wire));
- wire->attributes.erase(ID(\\init));
+ wire->attributes.erase(ID(init));
}
}
}