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author | Eddie Hung <eddie@fpgeh.com> | 2019-08-15 10:19:29 -0700 |
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committer | Eddie Hung <eddie@fpgeh.com> | 2019-08-15 10:19:29 -0700 |
commit | 78ba8b85749abacdf9a6953fd2e6f430b6041a94 (patch) | |
tree | 06641220842902317fd89a76e5f1726b6a6abe8d /passes/techmap/dffinit.cc | |
parent | 9f98241010481588d643c6d4e24d7b9af2b37c2f (diff) | |
download | yosys-78ba8b85749abacdf9a6953fd2e6f430b6041a94.tar.gz yosys-78ba8b85749abacdf9a6953fd2e6f430b6041a94.tar.bz2 yosys-78ba8b85749abacdf9a6953fd2e6f430b6041a94.zip |
Transform all "\\*" identifiers into ID()
Diffstat (limited to 'passes/techmap/dffinit.cc')
-rw-r--r-- | passes/techmap/dffinit.cc | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/passes/techmap/dffinit.cc b/passes/techmap/dffinit.cc index 0ad33dc0e..8962446c8 100644 --- a/passes/techmap/dffinit.cc +++ b/passes/techmap/dffinit.cc @@ -99,8 +99,8 @@ struct DffinitPass : public Pass { pool<SigBit> used_bits; for (auto wire : module->selected_wires()) { - if (wire->attributes.count("\\init")) { - Const value = wire->attributes.at("\\init"); + if (wire->attributes.count(ID(\\init))) { + Const value = wire->attributes.at(ID(\\init)); for (int i = 0; i < min(GetSize(value), GetSize(wire)); i++) if (value[i] != State::Sx) init_bits[sigmap(SigBit(wire, i))] = value[i]; @@ -161,8 +161,8 @@ struct DffinitPass : public Pass { } for (auto wire : module->selected_wires()) - if (wire->attributes.count("\\init")) { - Const &value = wire->attributes.at("\\init"); + if (wire->attributes.count(ID(\\init))) { + Const &value = wire->attributes.at(ID(\\init)); bool do_cleanup = true; for (int i = 0; i < min(GetSize(value), GetSize(wire)); i++) { SigBit bit = sigmap(SigBit(wire, i)); @@ -173,7 +173,7 @@ struct DffinitPass : public Pass { } if (do_cleanup) { log("Removing init attribute from wire %s.%s.\n", log_id(module), log_id(wire)); - wire->attributes.erase("\\init"); + wire->attributes.erase(ID(\\init)); } } } |