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| author | whitequark <whitequark@whitequark.org> | 2019-11-13 11:57:17 +0000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2019-11-13 11:57:17 +0000 |
| commit | ab0fb19cfff7760bfd69b49ed6d81a823be2a6ba (patch) | |
| tree | 0829cab4f0acb568903c5a34733adce1957a4036 /passes/techmap/flowmap.cc | |
| parent | 6e332161dbdc399c41041cebaf83cbb156b331a7 (diff) | |
| parent | c68722818a09ce541c380178ff17e548db9c897d (diff) | |
| download | yosys-ab0fb19cfff7760bfd69b49ed6d81a823be2a6ba.tar.gz yosys-ab0fb19cfff7760bfd69b49ed6d81a823be2a6ba.tar.bz2 yosys-ab0fb19cfff7760bfd69b49ed6d81a823be2a6ba.zip | |
Merge pull request #1488 from whitequark/flowmap-fixes
flowmap: fix a few crashes
Diffstat (limited to 'passes/techmap/flowmap.cc')
| -rw-r--r-- | passes/techmap/flowmap.cc | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/passes/techmap/flowmap.cc b/passes/techmap/flowmap.cc index 5807178dd..a2ad87f7d 100644 --- a/passes/techmap/flowmap.cc +++ b/passes/techmap/flowmap.cc @@ -394,7 +394,7 @@ struct FlowGraph pair<pool<RTLIL::SigBit>, pool<RTLIL::SigBit>> edge_cut() { - pool<RTLIL::SigBit> x, xi; + pool<RTLIL::SigBit> x = {source}, xi; // X and X̅ in the paper NodePrime source_prime = {source, true}; pool<NodePrime> visited; @@ -437,6 +437,7 @@ struct FlowGraph for (auto collapsed_node : collapsed[sink]) xi.insert(collapsed_node); + log_assert(x[source] && !xi[source]); log_assert(!x[sink] && xi[sink]); return {x, xi}; } @@ -1050,7 +1051,7 @@ struct FlowmapWorker auto cut_inputs = cut_lut_at_gate(lut, lut_gate); pool<RTLIL::SigBit> gate_inputs = cut_inputs.first, other_inputs = cut_inputs.second; - if (gate_inputs.empty() && (int)other_inputs.size() == order) + if (gate_inputs.empty() && (int)other_inputs.size() >= order) { if (debug_relax) log(" Breaking would result in a (k+1)-LUT.\n"); |