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authorEddie Hung <eddie@fpgeh.com>2019-08-20 11:57:52 -0700
committerEddie Hung <eddie@fpgeh.com>2019-08-20 11:57:52 -0700
commitd9fe4cccbf3cc03fa57b177fd13c6e900a2134f7 (patch)
treeaceb37b755f6b112e754bbdd50f0a4a6a6ee111d /passes/techmap/nlutmap.cc
parent297a9802122817e143b1e4b87fd0d4e357606a72 (diff)
parent3f4886e7a3ff14578b9c6d614efd360478e5886e (diff)
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Merge remote-tracking branch 'origin/master' into eddie/synth_xilinx
Diffstat (limited to 'passes/techmap/nlutmap.cc')
-rw-r--r--passes/techmap/nlutmap.cc6
1 files changed, 3 insertions, 3 deletions
diff --git a/passes/techmap/nlutmap.cc b/passes/techmap/nlutmap.cc
index cc765d89c..798d82248 100644
--- a/passes/techmap/nlutmap.cc
+++ b/passes/techmap/nlutmap.cc
@@ -82,10 +82,10 @@ struct NlutmapWorker
for (auto cell : module->cells())
{
- if (cell->type != "$lut" || mapped_cells.count(cell))
+ if (cell->type != ID($lut) || mapped_cells.count(cell))
continue;
- if (GetSize(cell->getPort("\\A")) == lut_size || lut_size == 2)
+ if (GetSize(cell->getPort(ID::A)) == lut_size || lut_size == 2)
candidate_ratings[cell] = 0;
for (auto &conn : cell->connections())
@@ -119,7 +119,7 @@ struct NlutmapWorker
if (config.assert_mode) {
for (auto cell : module->cells())
- if (cell->type == "$lut" && !mapped_cells.count(cell))
+ if (cell->type == ID($lut) && !mapped_cells.count(cell))
log_error("Insufficient number of LUTs to map all logic cells!\n");
}