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| author | Eddie Hung <eddie@fpgeh.com> | 2020-04-02 09:51:32 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2020-04-02 09:51:32 -0700 |
| commit | 956ecd48f71417b514c194a833a49238049e00b0 (patch) | |
| tree | 468d55265c2549c86a8e7dfaf4ec0afffbd613bb /passes/techmap/pmuxtree.cc | |
| parent | 2d86563bb206748d6eef498eb27f7a004f20113d (diff) | |
| download | yosys-956ecd48f71417b514c194a833a49238049e00b0.tar.gz yosys-956ecd48f71417b514c194a833a49238049e00b0.tar.bz2 yosys-956ecd48f71417b514c194a833a49238049e00b0.zip | |
kernel: big fat patch to use more ID::*, otherwise ID(*)
Diffstat (limited to 'passes/techmap/pmuxtree.cc')
| -rw-r--r-- | passes/techmap/pmuxtree.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/passes/techmap/pmuxtree.cc b/passes/techmap/pmuxtree.cc index 31ab13cec..2810b7f2d 100644 --- a/passes/techmap/pmuxtree.cc +++ b/passes/techmap/pmuxtree.cc @@ -93,7 +93,7 @@ struct PmuxtreePass : public Pass { continue; SigSpec sig_data = cell->getPort(ID::B); - SigSpec sig_sel = cell->getPort(ID(S)); + SigSpec sig_sel = cell->getPort(ID::S); if (!cell->getPort(ID::A).is_fully_undef()) { sig_data.append(cell->getPort(ID::A)); |