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authorEddie Hung <eddie@fpgeh.com>2019-08-20 11:57:52 -0700
committerEddie Hung <eddie@fpgeh.com>2019-08-20 11:57:52 -0700
commitd9fe4cccbf3cc03fa57b177fd13c6e900a2134f7 (patch)
treeaceb37b755f6b112e754bbdd50f0a4a6a6ee111d /passes/techmap/pmuxtree.cc
parent297a9802122817e143b1e4b87fd0d4e357606a72 (diff)
parent3f4886e7a3ff14578b9c6d614efd360478e5886e (diff)
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Merge remote-tracking branch 'origin/master' into eddie/synth_xilinx
Diffstat (limited to 'passes/techmap/pmuxtree.cc')
-rw-r--r--passes/techmap/pmuxtree.cc12
1 files changed, 6 insertions, 6 deletions
diff --git a/passes/techmap/pmuxtree.cc b/passes/techmap/pmuxtree.cc
index 6a923f481..31ab13cec 100644
--- a/passes/techmap/pmuxtree.cc
+++ b/passes/techmap/pmuxtree.cc
@@ -89,21 +89,21 @@ struct PmuxtreePass : public Pass {
for (auto module : design->selected_modules())
for (auto cell : module->selected_cells())
{
- if (cell->type != "$pmux")
+ if (cell->type != ID($pmux))
continue;
- SigSpec sig_data = cell->getPort("\\B");
- SigSpec sig_sel = cell->getPort("\\S");
+ SigSpec sig_data = cell->getPort(ID::B);
+ SigSpec sig_sel = cell->getPort(ID(S));
- if (!cell->getPort("\\A").is_fully_undef()) {
- sig_data.append(cell->getPort("\\A"));
+ if (!cell->getPort(ID::A).is_fully_undef()) {
+ sig_data.append(cell->getPort(ID::A));
SigSpec sig_sel_or = module->ReduceOr(NEW_ID, sig_sel);
sig_sel.append(module->Not(NEW_ID, sig_sel_or));
}
SigSpec result, result_or;
result = recursive_mux_generator(module, sig_data, sig_sel, result_or);
- module->connect(cell->getPort("\\Y"), result);
+ module->connect(cell->getPort(ID::Y), result);
module->remove(cell);
}
}