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| author | Clifford Wolf <clifford@clifford.at> | 2019-07-15 20:06:35 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2019-07-15 20:06:35 +0200 |
| commit | 2a7198db516800720e6e63d5676b68b8add81a5c (patch) | |
| tree | ddadcb239ac0ad1dbb8c74ad9165660c477b10d5 /passes/techmap | |
| parent | 2c5c53e4c1b4d40a3cf19136e3e87bb4f608d7a1 (diff) | |
| parent | ab3917d0791874bab845ca74203c5aaa2ec842d2 (diff) | |
| download | yosys-2a7198db516800720e6e63d5676b68b8add81a5c.tar.gz yosys-2a7198db516800720e6e63d5676b68b8add81a5c.tar.bz2 yosys-2a7198db516800720e6e63d5676b68b8add81a5c.zip | |
Merge pull request #1189 from YosysHQ/eddie/fix1151
Error out if enable > dbits in memory_bram file
Diffstat (limited to 'passes/techmap')
0 files changed, 0 insertions, 0 deletions