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| author | whitequark <whitequark@whitequark.org> | 2019-11-11 23:13:00 +0000 |
|---|---|---|
| committer | whitequark <whitequark@whitequark.org> | 2019-11-11 23:13:00 +0000 |
| commit | eef32195bd1afb4f029bf3039377e65f0beabac2 (patch) | |
| tree | c5733037bca86b1065a86f6e1f8eb2662797ab50 /passes/techmap | |
| parent | 1d148491c5a9b816297c08e5ea3a98ff0bd3623d (diff) | |
| download | yosys-eef32195bd1afb4f029bf3039377e65f0beabac2.tar.gz yosys-eef32195bd1afb4f029bf3039377e65f0beabac2.tar.bz2 yosys-eef32195bd1afb4f029bf3039377e65f0beabac2.zip | |
flowmap: don't break if that creates a k+2 (and larger) LUT either.
Fixes #1405.
Diffstat (limited to 'passes/techmap')
| -rw-r--r-- | passes/techmap/flowmap.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/passes/techmap/flowmap.cc b/passes/techmap/flowmap.cc index 5807178dd..96eee45db 100644 --- a/passes/techmap/flowmap.cc +++ b/passes/techmap/flowmap.cc @@ -1050,7 +1050,7 @@ struct FlowmapWorker auto cut_inputs = cut_lut_at_gate(lut, lut_gate); pool<RTLIL::SigBit> gate_inputs = cut_inputs.first, other_inputs = cut_inputs.second; - if (gate_inputs.empty() && (int)other_inputs.size() == order) + if (gate_inputs.empty() && (int)other_inputs.size() >= order) { if (debug_relax) log(" Breaking would result in a (k+1)-LUT.\n"); |