diff options
| author | Clifford Wolf <clifford@clifford.at> | 2016-11-29 13:30:35 +0100 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2016-11-29 13:30:35 +0100 |
| commit | ac7a175a3c55e83fbf4d85823a3f9220c86e3ed2 (patch) | |
| tree | c1e1140effe7d93cd849f3c425c0ffd3b06013a7 /passes | |
| parent | df2e5aad6f79556044aa80612f3f7ffb664ec617 (diff) | |
| download | yosys-ac7a175a3c55e83fbf4d85823a3f9220c86e3ed2.tar.gz yosys-ac7a175a3c55e83fbf4d85823a3f9220c86e3ed2.tar.bz2 yosys-ac7a175a3c55e83fbf4d85823a3f9220c86e3ed2.zip | |
Improved equiv_purge log output
Diffstat (limited to 'passes')
| -rw-r--r-- | passes/equiv/equiv_purge.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/passes/equiv/equiv_purge.cc b/passes/equiv/equiv_purge.cc index 163b1009b..6987ead35 100644 --- a/passes/equiv/equiv_purge.cc +++ b/passes/equiv/equiv_purge.cc @@ -80,7 +80,7 @@ struct EquivPurgeWorker Wire *wire = module->addWire(name, GetSize(sig)); wire->port_input = true; module->connect(sig, wire); - log(" Module input: %s\n", log_signal(wire)); + log(" Module input: %s (%s)\n", log_signal(wire), log_signal(sig)); return module->addWire(NEW_ID, GetSize(sig)); } } |