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| author | Clifford Wolf <clifford@clifford.at> | 2013-08-08 15:46:00 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2013-08-08 15:46:00 +0200 |
| commit | d97782b848bf5da4529e5b732b1ad06177539a93 (patch) | |
| tree | 5a8cdb84f9c311bd39782d8633d09768c1ba0aa8 /passes | |
| parent | 6a40e46a042ace384cabd78c7db967a271aadae7 (diff) | |
| download | yosys-d97782b848bf5da4529e5b732b1ad06177539a93.tar.gz yosys-d97782b848bf5da4529e5b732b1ad06177539a93.tar.bz2 yosys-d97782b848bf5da4529e5b732b1ad06177539a93.zip | |
Sort ctrl signals in fsm_extract
Diffstat (limited to 'passes')
| -rw-r--r-- | passes/fsm/fsm_extract.cc | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/passes/fsm/fsm_extract.cc b/passes/fsm/fsm_extract.cc index 6fb65de07..a593c3e65 100644 --- a/passes/fsm/fsm_extract.cc +++ b/passes/fsm/fsm_extract.cc @@ -247,6 +247,9 @@ static void extract_fsm(RTLIL::Wire *wire) } ctrl_in.remove(ctrl_out); + ctrl_in.sort_and_unify(); + ctrl_out.sort_and_unify(); + log(" ctrl inputs: %s\n", log_signal(ctrl_in)); log(" ctrl outputs: %s\n", log_signal(ctrl_out)); |