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| author | Clifford Wolf <clifford@clifford.at> | 2018-12-05 18:03:58 +0100 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2018-12-05 18:03:58 +0100 |
| commit | 2d98db73e39f17865ae26cdd00cf7c112521649f (patch) | |
| tree | e8a167fd82d1d94df256b34ae41470d31f426ca3 /techlibs/anlogic/cells_map.v | |
| parent | 50a94ce4fc64ef4b95dba4119e82df01680b0617 (diff) | |
| download | yosys-2d98db73e39f17865ae26cdd00cf7c112521649f.tar.gz yosys-2d98db73e39f17865ae26cdd00cf7c112521649f.tar.bz2 yosys-2d98db73e39f17865ae26cdd00cf7c112521649f.zip | |
Rename opt_lut.cpp to opt_lut.cc
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Diffstat (limited to 'techlibs/anlogic/cells_map.v')
0 files changed, 0 insertions, 0 deletions