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| author | Jim Lawson <ucbjrl@berkeley.edu> | 2019-02-11 12:43:46 -0800 |
|---|---|---|
| committer | Jim Lawson <ucbjrl@berkeley.edu> | 2019-02-11 12:43:46 -0800 |
| commit | 311396860b7380e5dc68e66c17d5083d1953fe3f (patch) | |
| tree | c5146a20e59acc342dfe414e1b35fdfe419b9e81 /techlibs/anlogic/synth_anlogic.cc | |
| parent | 76696e80041dc5b8f4ba986f4f83d6e7b6854e96 (diff) | |
| parent | e112d2fbf5a31f00ef19e6d05f28fecc1e9c56b9 (diff) | |
| download | yosys-311396860b7380e5dc68e66c17d5083d1953fe3f.tar.gz yosys-311396860b7380e5dc68e66c17d5083d1953fe3f.tar.bz2 yosys-311396860b7380e5dc68e66c17d5083d1953fe3f.zip | |
Merge remote-tracking branch 'upstream/master'
Diffstat (limited to 'techlibs/anlogic/synth_anlogic.cc')
| -rw-r--r-- | techlibs/anlogic/synth_anlogic.cc | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/techlibs/anlogic/synth_anlogic.cc b/techlibs/anlogic/synth_anlogic.cc index a4eafeddf..620bf3965 100644 --- a/techlibs/anlogic/synth_anlogic.cc +++ b/techlibs/anlogic/synth_anlogic.cc @@ -119,7 +119,7 @@ struct SynthAnlogicPass : public ScriptPass extra_args(args, argidx, design); if (!design->full_selection()) - log_cmd_error("This comannd only operates on fully selected designs!\n"); + log_cmd_error("This command only operates on fully selected designs!\n"); log_header(design, "Executing SYNTH_ANLOGIC pass.\n"); log_push(); @@ -154,6 +154,7 @@ struct SynthAnlogicPass : public ScriptPass { run("memory_bram -rules +/anlogic/drams.txt"); run("techmap -map +/anlogic/drams_map.v"); + run("anlogic_determine_init"); } if (check_label("fine")) @@ -170,13 +171,14 @@ struct SynthAnlogicPass : public ScriptPass { run("dffsr2dff"); run("techmap -D NO_LUT -map +/anlogic/cells_map.v"); + run("dffinit -strinit SET RESET -ff AL_MAP_SEQ q REGSET -noreinit"); run("opt_expr -mux_undef"); run("simplemap"); } if (check_label("map_luts")) { - run("abc -lut 6"); + run("abc -lut 4:6"); run("clean"); } |