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| author | Eddie Hung <eddie@fpgeh.com> | 2019-08-22 10:32:54 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-08-22 10:32:54 -0700 |
| commit | 718897264523667fd6252762aa0eb784594a79e1 (patch) | |
| tree | 881ba3178ec3bcbd0d777f3c13a8fcd3413fcf92 /techlibs/anlogic/synth_anlogic.cc | |
| parent | d0b297341373dd3633b1a78dfe10efffa28ea0e1 (diff) | |
| parent | b800059fc1f0f62c877bd529d2e7389471130055 (diff) | |
| download | yosys-718897264523667fd6252762aa0eb784594a79e1.tar.gz yosys-718897264523667fd6252762aa0eb784594a79e1.tar.bz2 yosys-718897264523667fd6252762aa0eb784594a79e1.zip | |
Merge remote-tracking branch 'origin/master' into eddie/xilinx_srl
Diffstat (limited to 'techlibs/anlogic/synth_anlogic.cc')
| -rw-r--r-- | techlibs/anlogic/synth_anlogic.cc | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/techlibs/anlogic/synth_anlogic.cc b/techlibs/anlogic/synth_anlogic.cc index 620bf3965..b87fc8566 100644 --- a/techlibs/anlogic/synth_anlogic.cc +++ b/techlibs/anlogic/synth_anlogic.cc @@ -154,7 +154,7 @@ struct SynthAnlogicPass : public ScriptPass { run("memory_bram -rules +/anlogic/drams.txt"); run("techmap -map +/anlogic/drams_map.v"); - run("anlogic_determine_init"); + run("setundef -zero -params t:EG_LOGIC_DRAM16X4"); } if (check_label("fine")) @@ -186,6 +186,11 @@ struct SynthAnlogicPass : public ScriptPass { run("techmap -map +/anlogic/cells_map.v"); run("clean"); + } + + if (check_label("map_anlogic")) + { + run("anlogic_fixcarry"); run("anlogic_eqn"); } |